Efficient Matrix Codes for Error Correction in Memory

In CMOS integrated circuits, electronic memories are widely used. As transistor size shrinks, multiple cell upsets are becoming an increasingly important factor in the reliability of memories exposed to radiation effects. To prevent the MCUs from causing data corruption, more complex error correction codes (ECCs) are widely used to protect memory. Recently, matrix codes (MCs) based on Hamming codes have been used for the memory protection. The decimal matrix code (DMC) based on divide-symbol is used to the enhance memory reliability with lower delay. The DMC utilizes decimal algorithm to obtain the maximum of the error detection capability. Moreover, the encoder-reuse technique (ERT) is used to minimize the area of the extra circuits without disturbing the whole encoding and the decoding processes The DMC is compared to the well-known codes such as the existing Hamming, MCs, and punctured difference set (PDS) codes.